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Showing posts from June, 2008

Finite State Machine


A machine consisting of a set of states, a start state, an input, and a transition function that maps input and current states to a next state. Machine begins in the start state with an input. It changes to new states depending on the transition function. The transition function depends on current states and inputs. The output of the machine depends on input and/or current state.

There are two types of FSMs which are popularly used in the digital design. They are
Moore machineMealy machine
Moore machine

In Moore machine the output depends only on current state.The advantage of the Moore model is a simplification of the behavior.

Mealy machine

In Mealy machine the output depend on both current state and input.The advantage of the Mealy model is that it may lead to reduction of the number of states.

In both models the next state depends on current state and input. Some times designers use mixed models. States will be encoded for representing a particular state.

Representation of a FS…

One-hot Encoding

Designing a FSM is the most common and challenging task for every digital logic designer. One of the key factors for optimizing a FSM design is the choice of state coding, which influences the complexity of the logic functions, the hardware costs of the circuits, timing issues, power usage, etc. There are several options like binary encoding, gray encoding, one-hot encoding, etc. The choice of the designer depends on the factors like technology, design specifications, etc.

One-hot encoding

In one-hot encoding only one bit of the state vector is asserted for any given state. All other state bits are zero. Thus if there are n states then n state flip-flops are required. As only one bit remains logic high and rest are logic low, it is called as One-hot encoding.
Example: If there is a FSM, which has 5 states. Then 5 flip-flops are required to implement the FSM using one-hot encoding. The states will have the following values:
S0 - 10000
S1 - 01000
S2 - 00100
S3 - 00010
S4 - 00001

State …

Microprocessor Interview Questions - 5

1. Why are program counter and stack pointer 16-bit registers?

Program Counter (PC) and Stack Pointer (SP) are basically used to hold 16-bit memory addresses.PC stores the 16-bit memory address of the next instruction to be fetched. SP stores address of stack's starting block.

2. What happens during DMA transfer?

During DMA transfers DMA controller takes control of the data transfer, and the processor will carry out other tasks.

3. Define ISR.

An interrupt handler, also known as an interrupt service routine (ISR), is a callback subroutine in an operating system or device driver whose execution is triggered by the reception of an interrupt. Whenever there is an interrupt the processor jumps to ISR and executes it.

4. Define PSW.

The Program Status Word (PSW) is a register which contains information about the current program status used by the operating system and the underlying hardware. The PSW includes the instruction address, condition code, and other fields. …