1. Why is the number of gate inputs to CMOS gates (e.g. NAND or NOR gates)usually limited to four?

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2. What are static and dynamic power dissipation w.r.t to CMOS gate?

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3. Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes (a) with increasing Vgs (b) considering Channel Length Modulation.

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4. Which is fastest among the following technologies: CMOS, BiCMOS, TTL, ECL?

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5. What is a transmission gate, and what is its typical use in VLSI?

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6. Draw the cross section of nMOS or pMOS.

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7. What should be done to the size of a pMOS transistor inorder to increase its threshold voltage?

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8. Explain the various MOSFET Capacitances and their significance.

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9. On what factors does the resistance of metal depend on?

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10. Draw the layout a CMOS NAND gate.

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## 2 Comments:

Which is fastest among the following technologies: CMOS, BiCMOS, TTL, ECL?

ans:ECL

ECL is fastest gate

CMOS having low power consumption, high noise margin, high propagation delay, high fanout

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