This sections contains interview questions related to LOW POWER VLSI DESIGN.
1. What are the important aspects of VLSI optimization?
Power, Area, and Speed.
2. What are the sources of power dissipation?
+ Dynamic power consumption, due to logic transitions causing logic gates to charge/discharge load capacitance.
+ Short-circuit current, this occurs when p-tree and n-tree shorted (for a while) during logic transition.
+ Leakage current, this is a very important source of power dissipation in nano technology, it increases with decrease in lambda value. It is caused due to diode leakages around transistors and n-wells.
3. What is the need for power reduction?
Low power increases noise immunity, increases batter life, decreases cooling and packaging costs.
4. Give some low power design techniques.
Voltage scaling, transistor resizing, pipelining and parallelism, power management modes like standby modes, etc.
5. Give a disadvantage of voltage scaling technique for power reduction.
When voltage is scaled, designers tend to decrease threshold voltage to maintain good noise margins. But decreasing threshold voltages increases leakage currents exponentially.
6. Give an expression for switching power dissipation.
Pswitching = (1/2)CVdd2f
Pswitching = Switching power.
C = Load capacitance.
Vdd = Supply voltage.
f = Operating frequency.
7. Will glitches in a logic circuit cause power wastage?
Yes, because they cause unexpected transitions in logic gates.
8. What is the major source of power wastage in SRAM?
To read/write a word data, activates a word line for a row which causes all the columns in the row to be active even though we need only a word data. This consumes a lot power.
9. What is the major problem associated with caches w.r.t low power design? Give techniques to overcome it.
Cache is a very important part of the integrated chips, they occupy most of the space and hence contain lot of transistors. More transistors means more leakage current. That is the major problem associated with caches w.r.t. low power design. The following techniques are used to overcome it: Vdd-Gating, Cache decay, Drowsy caches, etc.
10. Does software play any role in low power design?
Yes, one can redesign a software to reduce power consumptions. For example modify the process algorithm which uses less number of computations.