1. What is Program counter?
Program counter holds the address of either the first byte of the next instruction to be fetched for execution or the address of the next byte of a multi byte instruction, which has not been completely fetched. In both the cases it gets incremented automatically one by one as the instruction bytes get fetched. Also Program register keeps the address of the next instruction.
2. Do 8085(8-bit processor) have any 16 bit registers?
Yes, Stack pointer and Program counter are 16 bit registers.
3. What type of Stack is used in 8085?
LIFO (Last In First Out) stack is used in 8085. In this type of Stack the last pushed byte will be popped first.
4. What is HLT?
In x86 architecture, HLT is an assembly language instruction which halts the CPU until the next external interrupt is fired. The Micro Processor enters into halt-state and the buses are tri-stated.
5. What is a bus?
A bus is a group of conducting lines which carry data, address, and control signals.
6. What is Quality factor?
The Quality factor is also defined, as Q, it is a number, which reflects the chances of failure of a circuit. Higher the Q, the lower are the chances of errors/failures.
7. What is tri-state logic?
Three Logic Levels are used and they are high, low, and high impedance state. The high and low are logic one and zero levels. THe high impedance state is electrical open circuit condition. Tri-state logic has a third line called enable line.
8. What is NMI?
A non-maskable interrupt (NMI) is a computer processor interrupt that cannot be ignored by standard interrupt masking techniques in the system. It is typically used to signal attention for non-recoverable hardware errors.
9. What is meant by an interrupt?
An interrupt is an asynchronous signal from hardware indicating the need for attention or a synchronous event in software indicating the need for a change in execution. A hardware interrupt causes the processor to save its state of execution via a context switch, and begin execution of an interrupt handler. Software interrupts are usually implemented as instructions in the instruction set, which cause a context switch to an interrupt handler similar to a hardware interrupt.
10. What are level-triggered and edge-triggered interrupts?
A level-triggered interrupt is a class of interrupts where the presence of an unserviced interrupt is indicated by a high level (1), or low level (0), of the interrupt request line.
An edge-triggered interrupt is a class of interrupts that are signaled by a level transition on the interrupt line, either a falling edge (1 to 0) or a rising edge (0 to 1).