1. How do you convert a XOR gate into a buffer and a inverter (Use only one XOR gate for each)?

Answer

2. Implement an 2-input AND gate using a 2x1 mux.

Answer

3. What is a multiplexer?

Answer

4. What is a ring counter?

Answer

5. Compare and Contrast Synchronous and Asynchronous reset.

Answer

6. What is a Johnson counter?

Answer

7. An assembly line has 3 fail safe sensors and one emergency shutdown switch.The line should keep moving unless any of the following conditions arise:

(1) If the emergency switch is pressed

(2) If the senor1 and sensor2 are activated at the same time.

(3) If sensor 2 and sensor3 are activated at the same time.

(4) If all the sensors are activated at the same time

Suppose a combinational circuit for above case is to be implemented only with NAND Gates. How many minimum number of 2 input NAND gates are required?

Answer

8. In a 4-bit Johnson counter How many unused states are present?

Answer

9. Design a 3 input NAND gate using minimum number of 2 input NAND gates.

Answer

10. How can you convert a JK flip-flop to a D flip-flop?

Answer

11. What are the differences between a flip-flop and a latch?

Answer

12. What is the difference between Mealy and Moore FSM?

Answer

13. What are various types of state encoding techniques? Explain them.

Answer

14. Define Clock Skew , Negative Clock Skew, Positive Clock Skew.

Answer

15. Give the transistor level circuit of a CMOS NAND gate.

Answer

16. Design a 4-bit comparator circuit.

Answer

17. Design a Transmission Gate based XOR. Now, how do you convert it to XNOR (without inverting the output)?

Answer

18. Define Metastability.

Answer

19. Compare and contrast between 1's complement and 2's complement notation.

Answer

20. Give the transistor level circuit of CMOS, nMOS, pMOS, and TTL inverter gate.

Answer

21. What are set up time and hold time constraints?

Answer

22. Give a circuit to divide frequency of clock cycle by two.

Answer

23. Design a divide-by-3 sequential circuit with 50% duty circle.

Answer

24. Explain different types of adder circuits.

Answer

25. Give two ways of converting a two input NAND gate to an inverter.

Answer

26. Draw a Transmission Gate-based D-Latch.

Answer

27. Design a FSM which detects the sequence 10101 from a serial line without overlapping.

Answer

28. Design a FSM which detects the sequence 10101 from a serial line with overlapping.

Answer

29. Give the design of 8x1 multiplexer using 2x1 multiplexers.

Answer

30. Design a counter which counts from 1 to 10 ( Resets to 1, after 10 ).

Answer

31. Design 2 input AND, OR, and EXOR gates using 2 input NAND gate.

Answer

32. Design a circuit which doubles the frequency of a given input clock signal.

Answer

33. Implement a D-latch using 2x1 multiplexer(s).

Answer

34. Give the excitation table of a JK flip-flop.

Answer

35. Give the Binary, Hexadecimal, BCD, and Excess-3 code for decimal 14.

Answer

36. What is race condition?

Answer

37. Give 1's and 2's complement of 19.

Answer

38. Design a 3:6 decoder.

Answer

39. If A*B=C and C*A=B then, what is the Boolean operator * ?

Answer

40. Design a 3 bit Gray Counter.

Answer

41. Expand the following: PLA, PAL, CPLD, FPGA.

Answer

42. Implement the functions: X = A'BC + ABC + A'B'C' and Y = ABC + AB'C using a PLA.

Answer

43. What are PLA and PAL? Give the differences between them.

Answer

44. What is LUT?

Answer

45. What is the significance of FPGAs in modern day electronics? (Applications of FPGA.)

Answer

46. What are the differences between CPLD and FPGA.

Answer

47. Compare and contrast FPGA and ASIC digital designing.

Answer

48. Give True or False.

(a) CPLD consumes less power per gate when compared to FPGA.

(b) CPLD has more complexity than FPGA

(c) FPGA design is slower than corresponding ASIC design.

(d) FPGA can be used to verify the design before making a ASIC.

(e) PALs have programmable OR plane.

(f) FPGA designs are cheaper than corresponding ASIC, irrespective of design complexity.

Answer

49. Arrange the following in the increasing order of their complexity: FPGA,PLA,CPLD,PAL.

Answer

50. Give the FPGA digital design cycle.

Answer

51. What is DeMorgan's theorem?

Answer

52. F'(A, B, C, D) = C'D + ABC' + ABCD + D. Express F in Product of Sum form.

Answer

53. How many squares/cells will be present in the k-map of F(A, B, C)?

Answer

54. Simplify F(A, B, C, D) = S ( 0, 1, 4, 5, 7, 8, 9, 12, 13)

Answer

55. Simplify F(A, B, C) = S (0, 2, 4, 5, 6) into Product of Sums.

Answer

56. The simplified expression obtained by using k-map method is unique. True or False. Explain your answer.

Answer

57. Give the characteristic tables of RS, JK, D and T flip-flops.

Answer

58. Give excitation tables of RS, JK, D and T flip-flops.

Answer

59. Design a BCD counter with JK flip-flops

Answer

60. Design a counter with the following binary sequence 0, 1, 9, 3, 2, 8, 4 and repeat. Use T flip-flops.

Answer

Answer

2. Implement an 2-input AND gate using a 2x1 mux.

Answer

3. What is a multiplexer?

Answer

4. What is a ring counter?

Answer

5. Compare and Contrast Synchronous and Asynchronous reset.

Answer

6. What is a Johnson counter?

Answer

7. An assembly line has 3 fail safe sensors and one emergency shutdown switch.The line should keep moving unless any of the following conditions arise:

(1) If the emergency switch is pressed

(2) If the senor1 and sensor2 are activated at the same time.

(3) If sensor 2 and sensor3 are activated at the same time.

(4) If all the sensors are activated at the same time

Suppose a combinational circuit for above case is to be implemented only with NAND Gates. How many minimum number of 2 input NAND gates are required?

Answer

8. In a 4-bit Johnson counter How many unused states are present?

Answer

9. Design a 3 input NAND gate using minimum number of 2 input NAND gates.

Answer

10. How can you convert a JK flip-flop to a D flip-flop?

Answer

11. What are the differences between a flip-flop and a latch?

Answer

12. What is the difference between Mealy and Moore FSM?

Answer

13. What are various types of state encoding techniques? Explain them.

Answer

14. Define Clock Skew , Negative Clock Skew, Positive Clock Skew.

Answer

15. Give the transistor level circuit of a CMOS NAND gate.

Answer

16. Design a 4-bit comparator circuit.

Answer

17. Design a Transmission Gate based XOR. Now, how do you convert it to XNOR (without inverting the output)?

Answer

18. Define Metastability.

Answer

19. Compare and contrast between 1's complement and 2's complement notation.

Answer

20. Give the transistor level circuit of CMOS, nMOS, pMOS, and TTL inverter gate.

Answer

21. What are set up time and hold time constraints?

Answer

22. Give a circuit to divide frequency of clock cycle by two.

Answer

23. Design a divide-by-3 sequential circuit with 50% duty circle.

Answer

24. Explain different types of adder circuits.

Answer

25. Give two ways of converting a two input NAND gate to an inverter.

Answer

26. Draw a Transmission Gate-based D-Latch.

Answer

27. Design a FSM which detects the sequence 10101 from a serial line without overlapping.

Answer

28. Design a FSM which detects the sequence 10101 from a serial line with overlapping.

Answer

29. Give the design of 8x1 multiplexer using 2x1 multiplexers.

Answer

30. Design a counter which counts from 1 to 10 ( Resets to 1, after 10 ).

Answer

31. Design 2 input AND, OR, and EXOR gates using 2 input NAND gate.

Answer

32. Design a circuit which doubles the frequency of a given input clock signal.

Answer

33. Implement a D-latch using 2x1 multiplexer(s).

Answer

34. Give the excitation table of a JK flip-flop.

Answer

35. Give the Binary, Hexadecimal, BCD, and Excess-3 code for decimal 14.

Answer

36. What is race condition?

Answer

37. Give 1's and 2's complement of 19.

Answer

38. Design a 3:6 decoder.

Answer

39. If A*B=C and C*A=B then, what is the Boolean operator * ?

Answer

40. Design a 3 bit Gray Counter.

Answer

41. Expand the following: PLA, PAL, CPLD, FPGA.

Answer

42. Implement the functions: X = A'BC + ABC + A'B'C' and Y = ABC + AB'C using a PLA.

Answer

43. What are PLA and PAL? Give the differences between them.

Answer

44. What is LUT?

Answer

45. What is the significance of FPGAs in modern day electronics? (Applications of FPGA.)

Answer

46. What are the differences between CPLD and FPGA.

Answer

47. Compare and contrast FPGA and ASIC digital designing.

Answer

48. Give True or False.

(a) CPLD consumes less power per gate when compared to FPGA.

(b) CPLD has more complexity than FPGA

(c) FPGA design is slower than corresponding ASIC design.

(d) FPGA can be used to verify the design before making a ASIC.

(e) PALs have programmable OR plane.

(f) FPGA designs are cheaper than corresponding ASIC, irrespective of design complexity.

Answer

49. Arrange the following in the increasing order of their complexity: FPGA,PLA,CPLD,PAL.

Answer

50. Give the FPGA digital design cycle.

Answer

51. What is DeMorgan's theorem?

Answer

52. F'(A, B, C, D) = C'D + ABC' + ABCD + D. Express F in Product of Sum form.

Answer

53. How many squares/cells will be present in the k-map of F(A, B, C)?

Answer

54. Simplify F(A, B, C, D) = S ( 0, 1, 4, 5, 7, 8, 9, 12, 13)

Answer

55. Simplify F(A, B, C) = S (0, 2, 4, 5, 6) into Product of Sums.

Answer

56. The simplified expression obtained by using k-map method is unique. True or False. Explain your answer.

Answer

57. Give the characteristic tables of RS, JK, D and T flip-flops.

Answer

58. Give excitation tables of RS, JK, D and T flip-flops.

Answer

59. Design a BCD counter with JK flip-flops

Answer

60. Design a counter with the following binary sequence 0, 1, 9, 3, 2, 8, 4 and repeat. Use T flip-flops.

Answer

## Comments

Android Training in Chennai

Ios Training in Chennai

Herbalife in Chennai

Wellnesscentres in Chennai

Weight loss in Chennai

Weight gain in Chennai

aws Training in indira nagar | Aws course in indira Nagar

selenium Training in indira nagar | Best selenium course in indira Nagar | selenium course in indira Nagar

python Training in indira nagar | Best python training in indira Nagar

datascience Training in indira nagar | Data science course in indira Nagar

devops Training in indira nagar | Best devops course in indira Nagar

Java training in Pune

Java interview questions and answers

Java training in Chennai | Java training institute in Chennai | Java course in Chennai

Java training in Bangalore | Java training institute in Bangalore | Java course in Bangalore

Best Devops Training in pune

Devops interview questions and answers

Devops interview questions and answers

python course in pune

python course in chennai

python Training in Bangalore

Data Science Training in Indira nagar

Data Science training in marathahalli

Data Science Interview questions and answers

Data Science training in btm layout | Data Science Training in Bangalore

Data Science Training in BTM Layout | Data Science training in Bangalore

Data science training in kalyan nagar

rpa training in chennai |best rpa training in chennai|

rpa training in bangalore | best rpa training in bangalore

interior designers in chennai

interior decorators in chennai

modular kitchen in chennai

modular kitchen chennai

hotel interior designers in chennai

corporate interior designers in chennai

office interior designers in chennai

Advanced AWS Training in Bangalore | Best Amazon Web Services Training Institute in Bangalore

Advanced AWS Training Institute in Pune | Best Amazon Web Services Training Institute in Pune

Advanced AWS Online Training Institute in india | Best Online AWS Certification Course in india

honor mobile service center

honor mobile service centre in Chennai

honor service center near me

honor service

DevOps Training in Chennai

DevOps Certification in Chennai

AWS Training in Chennai

AWS course in Chennai

RPA Training in Chennai

DevOps Training in Velachery

DevOps Training in Tambaram

DevOps course in Chennai

Information from this blog is very useful for me, am very happy to read this blog Kindly visit us @ Luxury Watch Box | Shoe Box Manufacturer | Candle Packaging Boxes

Full Stack Development Training in Chennai Searching for Full Stack Development training in chennai ? Bita Academy is the No 1 Training Institute in Chennai. Call for more details.

PCB Reverse Engineering Services

Prototype Company

Electronic Design Company

Circuit Design Services

Electronic Product Development

Prototype Makers

Prototype Makers

SunMan provides electronic circuit design services to technology companies across many applications including Mixed analog/digital, bluetooth, wireless, RF Designs, and more. We design all kinds of Electronic Circuits & Electronic Products according to custom specifications.

My name is Leah Brown, I'm a happy woman today? I told myself that any loan lender that could change my life and that of my family after having been scammed separately by these online loan lenders, I will refer to anyone who is looking for loan for them. It gave me and my family happiness, although at first I had a hard time trusting him because of my experiences with past loan lenders, I needed a loan of $300,000.00 to start my life everywhere as single mother with 2 children, I met this honest and God fearing online loan lender Gain Credit Loan who helped me with a $300,000.00 loan, working with a loan company Good reputation. If you are in need of a loan and you are 100% sure of paying the loan please contact (gaincreditloan1@gmail.com)

Much thanks to you for setting aside the effort to give us your significant data.

DevOps training in Pune with placement

Python Training in Pune with placements

Custom application development in chennai

UIpath development in chennai

rpa development in chennai

Robotic Process Automation in chennai

erp in chennai

best software company in chennai

Awesome! Thanks for sharing this informative post and Its really worth reading.

best catering services in chennai

top catering services in chennai

corporate catering services in chennai

taste catering services in chennai

party catering services in chennai

Erp In Chennai

IT Infrastructure Services

ERP software company in India

Mobile Application Development Company in India

ERP in India

Web development company in chennai

We are a creative Digital Media Company with experienced team:-

Digital Marketing Company | SEO Company | PPC Company | Mobile App Development Company | Mobile App Development Company Lucknow | Website Designing CompanySome Important Links:-

Importance of SEO in Digital Marketing | Benefits and Importance of Digital MarketingTAKSHILA-VLSI

Analog Circuit Design Training Institutes In Bangalore

Best Analog Layout Training Institutes

Takshila-Vlsi

Vlsi Courses

Cadence Vlsi Training

vlsi training for companies

Dft Training

Physical Verification Training

Pd Training Institutes

Dft Training

Verilog Training Institutes

System Verilog Training

Asic Verification Training Institutes With Placement Guarantee

ZYNQ FPGA Courses

FPGA SOC Training

ASIC Design Training

Takshila-Vlsi

Vlsi Courses

Cadence Vlsi Training

Industry Standard VLSI Training

VLSI Training Institutes In Hyderabad

vlsi training for companies

Dft Training

Physical Verification Training

Pd Training Institutes

Dft Training

Verilog Training Institutes

System Verilog Training

Asic Verification Training Institutes With Placement Guarantee

ZYNQ FPGA Courses

FPGA SOC Training

ASIC Design Training

VLSICHIP is offering world class industry oriented VLSI - Design Verification training program using Cadence Incisive Enterprise Simulator.

aws training in bangalore

aws videos

Vlsi Training

TCL Course