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Showing posts from January, 2009

First Things First -- Preparing a Good Resume

As the title says first things first, it’s very important to have good and attractive resume to get an interview call or to get shortlisted. It is always advised to start writing your own resume from scratch instead of copying/following someone else's content or template. So here are some points you should keep in mind before start writing your resume.
Most of the times your resume will be first reviewed and shortlisted by HR officers, who rarely have technical knowledge, they just look for some keywords provided by the technical manager. Keywords like Verilog, Tools names, years of experience, etc.The reviewer usually takes less than 5 minutes (or 3 minutes) to go through your resume, so make it concise.Resume should not (or never) be greater than two pages. Don't try to act smart by using small/tiny font sizes.First page should present your best qualities. It’s not like you start low and finish high, in resume you have to always start HIGH.Don't make a fancy or colourful …

Digital Design Interview Questions - All in 1

1. How do you convert a XOR gate into a buffer and a inverter (Use only one XOR gate for each)?

2. Implement an 2-input AND gate using a 2x1 mux.

3. What is a multiplexer?

A multiplexer is a combinational circuit which selects one of many input signals and directs to the only output.

4. What is a ring counter?

A ring counter is a type of counter composed of a circular shift register. The output of the last shift register is fed to the input of the first register. For example, in a 4-register counter, with initial register values of 1100, the repeating pattern is: 1100, 0110, 0011, 1001, 1100, so on.

5. Compare and Contrast Synchronous and Asynchronous reset.

Synchronous reset logic will synthesize to smaller flip-flops, particularly if the reset is gated with the logic generating the d-input. But in such a case, the combinational logic gate count grows, so the overall gate count savings may not be that significant. The clock works as a filter for small reset gl…

Digital Design Interview Questions - 6

1. What is DeMorgan's theorem?

For N variables, DeMorgan’s theorems are expressed in the following formulas:
(ABC..N)' = A' + B' + C' + ... + N' -- The complement of the product is equivalent to the sum of the complements.
(A + B + C + ... + N)' = A'B'C'...N' -- The complement of the sum is equivalent to the product of the complements.
This relationship so induced is called DeMorgan's duality.

2. F'(A, B, C, D) = C'D + ABC' + ABCD + D. Express F in Product of Sum form.

Complementing both sides and applying DeMorgan's Theorem:
F(A, B, C, D) = (C + D')(A' + B' + C)(A' + B' + C' + D')(D')

3. How many squares/cells will be present in the k-map of F(A, B, C)?

F(A, B, C) has three variables/inputs.
Therefore, number of squares/cells in k-map of F = 2(Number of variables) = 23 = 8.

4. Simplify F(A, B, C, D) = Σ ( 0, 1, 4, 5, 7, 8, 9, 12, 13)

The four variable k-map of the given express…

Boolean Expression Simplification

The k-map Method

The "Karnaugh Map Method", also known as k-map method, is popularly used to simplify Boolean expressions. The map method is first proposed by Veitch and then modified by Karnaugh, hence it is also known as "Veitch Diagram". The map is a diagram made up of squares (equal to 2 power number of inputs/variables). Each square represents a minterm, hence any Boolean expression can be represented graphically using a k-map.

The above diagram shows two (I), three (II) and four (III) variable k-maps. The number of squares is equal 2 power number of variables. Two adjacent squares will differ only by one variable. The numbers inside the squares are shown for understanding purpose only. The number shown corresponds to a minterm in the the Boolean expression.

Simplification using k-map:
Obtain the logic expression in canonical form.Identify all the minterms that produce an output of logic level 1 and place 1 in appropriate k-map cell/square. All others cells must c…